GENERAL DESCRIPTION The AD6653 is a mixed-signal intermediate frequency (IF) receiver consisting of dual, 12-bit, 125 MSPS/150 MSPS ADCs and a wideband digital downconverter (DDC). The AD6653 is designed to support communications applications where low cost, small size, and versatility are desired. FEATURES SNR = 70.8 dBc (71.8 dBFS) in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 83 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider Integrated dual-channel ADC Sample rates up to 150 MSPS IF sampling frequencies to 450 MHz Internal ADC voltage reference Integrated ADC sample-and-hold inputs Flexible analog input range: 1 V p-p to 2 V p-p ADC clock duty cycle stabilizer 95 dB channel isolation/crosstalk Integrated wideband digital downconverter (DDC) 32-bit, complex, numerically controlled oscillator (NCO) Decimating half-band filter and FIR filter Supports real and complex output modes Fast attack/threshold detect bits Composite signal monitor Energy-saving power-down modes APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Broadband data applications
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