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MX29F100TTA-90 データシート (PDF) - Macronix International

MX29F100TTA-90 Datasheet PDF - Macronix International
部品番号 MX29F100TTA-90
ダウンロード  MX29F100TTA-90 ダウンロード

ファイルサイズ   706.13 Kbytes
ページ   47 Pages
メーカー  MCNIX [Macronix International]
ホームページ  http://www.macronix.com
Logo MCNIX - Macronix International
部品情報 1M-BIT [128Kx8/64Kx16] CMOS FLASH MEMORY

MX29F100TTA-90 Datasheet (PDF)

Go To PDF Page ダウンロード データシート
MX29F100TTA-90 Datasheet PDF - Macronix International

部品番号 MX29F100TTA-90
ダウンロード  MX29F100TTA-90 Click to download

ファイルサイズ   706.13 Kbytes
ページ   47 Pages
メーカー  MCNIX [Macronix International]
ホームページ  http://www.macronix.com
Logo MCNIX - Macronix International
部品情報 1M-BIT [128Kx8/64Kx16] CMOS FLASH MEMORY

MX29F100TTA-90 データシート (HTML) - Macronix International

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MX29F100TTA-90 製品詳細

GENERAL DESCRIPTION
The MX29F100T/B is a 1-mega bit Flash memory organized as 131,072 bytes or 65,536 words. MXICs Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29F100T/B is packaged in 44-pin SOP and 48-pin TSOP. It is designed to be reprogrammed and erased in-system or in-standard EPROM programmers.

FEATURES
• 5V±10% for read, erase and write operation
• 131072x8/ 65536x16 switchable
• Fast access time:55/70/90/120ns
• Low power consumption
    - 40mA maximum active current(5MHz)
    - 1uA typical standby current
• Command register architecture
    - Byte/ Word Programming (7us/ 12us typical)
    - Erase (16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and 64K-Byte x1)
• Auto Erase (chip) and Auto Program
    - Automatically erase any combination of sectors or with Erase Suspend capability.
    - Automatically program and verify data at specified address
• Status Reply
    - Data polling & Toggle bit for detection of program and erase cycle completion.
• Compatibility with JEDEC standard
    - Pinout and software compatible with single-power supply Flash
    - Superior inadvertent write protection
• Sector protection
    - Hardware method to disable any combination of sectors from program or erase operations
    - Sector protect/unprotect for 5V only system or 5V/ 12V system
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1 to VCC+1V
• Boot Code Sector Architecture
    - T = Top Boot Sector
    - B = Bottom Boot Sector
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
    - 44-pin SOP
    - 48-pin TSOP
• Ready/Busy pin(RY/BY)
    - Provides a hardware method or detecting program or erase cycle completion
• Erase suspend/ Erase Resume
    - Suspend an erase operation to read data from, or program data to a sector that is not being erased, then resume the erase operation.
• Hardware RESET pin
    - Hardware method of resetting the device to reading the device to reading array data.
• 20 years data retention




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