STR720 datasheet(361/401 Pages) STMICROELECTRONICS

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STR720 データシート(PDF) 361 Page - STMicroelectronics

部品番号	STR720

部品情報	ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES

PDF	401 Pages

Scroll/Zoom	100%

メーカー	STMICROELECTRONICS [STMicroelectronics]

ホームページ	http://www.st.com

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361 / 401 page

STR720 - MISCELLANEA REGISTERS (GCR - CGC - AHB_ERR)

361/401

AHB Error Mask (AERR_M)

Address: 0xF000_3004

Reset value: 0x0000_0000

This register allows application software to mask the FIQ interrupt generation upon the

detection of any AHB error, when such feature is not required. The block will still detect faulty

transfers on the system bus, just the interrupt generation is disabled. This register is

read-write.

Bits 31:1 = Reserved. These bits must be always written to 0.

Bit 0 = AE_M: AHB Error Mask

0: AHB error interrupts masked.

1: AHB error interrupts enabled.

Reserved

765432

Reserved

AE_M

-rw

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