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STM32H723VG データシート(PDF) 197 Page - STMicroelectronics |
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STM32H723VG データシート(HTML) 197 Page - STMicroelectronics |
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197 / 227 page  DS13313 Rev 2 197/227 STM32H723xE/G Electrical characteristics 208 SAI characteristics Unless otherwise specified, the parameters given in Table 109 for SAI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 12: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitive load CL = 30 pF • IO Compensation cell activated. • Measurement points are done at CMOS levels: 0.5VDD • VOS level set to VOS0 Refer to Section 6.3.16: I/O port characteristics for more details on the input/output alternate function characteristics (SCK,SD,WS). Table 109. SAI characteristics(1) Symbol Parameter Conditions Min Max Unit fMCK SAI Main clock output - - 50 MHz fCK SAI clock frequency(2) Master transmitter, 2.7 V ≤ VDD ≤ 3.6 V - 45 Master transmitter, 1.62 V ≤ VDD ≤ 3.6 V - 32 Master receiver, 1.62 V ≤ VDD ≤ 3.6 V - 32 Slave transmitter, 2.7 V ≤ VDD ≤ 3.6 V - 47.5 Slave transmitter, 1.62 V ≤ VDD ≤ 3.6 V - 41.5 Slave receiver, 1.62 V ≤ VDD ≤ 3.6 V - 50 |
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