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データシートサーチシステム |
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ASM58-H データシート(PDF) 4 Page - Pepperl+Fuchs Inc. |
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ASM58-H データシート(HTML) 4 Page - Pepperl+Fuchs Inc. |
4 / 7 page ![]() Germany: +49 621 776 4411 Pepperl+Fuchs Group Refer to “General Notes Relating to Pepperl+Fuchs Product Information”. USA: +1 330 486 0001 Singapore: +65 6779 9091 www.pepperl-fuchs.com fa-info@us.pepperl-fuchs.com fa-info@sg.pepperl-fuchs.com fa-info@de.pepperl-fuchs.com Multiturn absolute encoder ASM58-H 4 The Synchronous Serial Interface was specially developed for transferring the output data of an absolute encoder to a control device. The control module sends a clock bundle and the absolute encoder responds with the position value. Thus only 4 lines are required for the clock and data, no matter what the resolution of the rotary encoder is. The RS 422 interface is optically isolated from the power supply. SSI signal course Standard SSI output format Standard • At idle status signal lines "Data +" and "Clock +" are at high level (5 V). • The first time the clock signal switches from high to low, the data transfer in which the current information (position data (Dn) and special bit (S)) is stored in the encoder is introduced. • The highest order bit (MSB) is applied to the serial data output of the encoder with the first rising pulse edge. • The next successive lower order bit is transferred with each following rising pulse edge. • After the lowest order bit (LSB) has been transferred the data line switches to low until the monoflop time Tm has expired. • No subsequent data transfer can be started until the data line switches to high again or the time for the clock pause Tp has expired. • After the clock sequence is complete, the monoflop time Tm is triggered with the last falling pulse edge. • The monoflop time Tm determines the lowest transmission frequency. SSI output format ring slide operation (multiple transmission) • In ring slide operation, multiple transmission of the same data word over the SSI interface makes it possible to offer the possibility of detecting trans- mission errors. • In multiple transmission, 25 bits are transferred per data word in standard format. • If the clock change is not interrupted after the last falling pulse edge, ring slide operation automatically becomes active. This means that the infor- mation that was stored at the time of the first clock change is generated again. • After the first transmission, the 26th pulse controls data repetition. If the 26th pulse follows after an amount of time greater than the monoflop time Tm, a new current data word will be transmitted with the following pulses. If the pulse line is exchanged, the data word is generated offset. Ring slide operation is possible up to max. 13 bits. Block diagram Line length The selection of the counting direction input (V/R) is activated with 0-level. Description Input D1, ..., Dn: T = 1/f: Tm: Tp: S: MSB: LSB: Position data Special bit Most significant bit Least significant bit Duration of period of clock signal ≤ 1 MHz Monoflop time 10 µs ... 30 µs Clock pause ≥ monoflop time (Tp ≥ Tm) LSB MSB Tp Tm T Clock + Data + Dn Dn-1 Dn-2 Dn-3 D2 D1 S Line length in m Baudrate in kHz < 50 < 400 < 100 < 300 < 200 < 200 < 400 < 100 Rotary encoder Interface electronics Receiver Logic Clock generator Data + Data - Clock - Clock + |
同様の部品番号 - ASM58-H |
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同様の説明 - ASM58-H |
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