STM32WLE4JC datasheet(114/146 Pages) STMICROELECTRONICS

部品番号	STM32WLE4JC

部品情報	Multiprotocol LPWAN 32-bit Arm® Cortex®-M4 MCUs, LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM

PDF	146 Pages

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Electrical characteristics

STM32WLE5/E4xx

114/146

DS13105 Rev 9

5.3.19

Analog-to-digital converter characteristics

Unless otherwise specified, the parameters given in the table below are preliminary values

derived from tests performed under ambient temperature, fPCLK frequency and VDDA supply

voltage conditions summarized in Table 25: General operating conditions.

Note:

It is recommended to perform a calibration after each power-up.

Table 77. ADC characteristics(1)

Symbol

Parameter

Conditions(2)

Min

Typ

Max

Unit

VDDA

Analog supply voltage

1.62

3.6

VREF+

Positive reference

voltage

VDDA ≥ 2 V

VDDA

VDDA < 2 V

VDDA

fADC

ADC clock frequency

Range 1

0.14

MHz

Range 2

0.14

Sampling rate

12 bits, VDDA > 2 V

2.50

Msps

10 bits, VDDA > 2 V

2.92

8 bits, VDDA > 2 V

3.50

6 bits, VDDA > 2 V

4.38

12 bits, VDDA ≤ 2 V

2.18

10 bits, VDDA ≤ 2 V

2.50

8 bits, VDDA ≤ 2 V

2.92

6 bits, VDDA ≤ 2 V

3.50

fTRIG

External trigger

frequency

fADC = 35 MHz,

12 bits, VDDA > 2 V

2.35

MHz

fADC = 35 MHz,

12 bits, VDDA ≤ 2 V

2.18

12 bits, VDDA > 2 V

fADC/15

12 bits, VDDA ≤ 2 V

fADC/17

VAIN

Conversion voltage

range

-VSS

-VREF+

RAIN

External input

impedance

kΩ

CADC

Internal sample and

hold capacitor

tSTAB

ADC power-up time

Conversion

cycle

tCAL

Calibration time

fADC = 35 MHz

2.35

µs

-82

1/fADC

STM32WLE4JC データシート(PDF) 114 Page - STMicroelectronics

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