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データシートサーチシステム |
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データシートサーチシステム |
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AM6421...ALV データシート(PDF) 209 Page - Texas Instruments |
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AM6421...ALV データシート(HTML) 209 Page - Texas Instruments |
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209 / 244 page  Table 7-141. Timer Timing Conditions (continued) PARAMETER MIN MAX UNIT SRI Input slew rate 0.5 5 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 10 pF Table 7-142. Timer Input Timing Requirements see Figure 7-114 NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT T1 tw(TINPH) Pulse duration, high CAPTURE 2 + 4P (1) ns T2 tw(TINPL) Pulse duration, low CAPTURE 2 + 4P (1) ns (1) P = functional clock period in ns. Table 7-143. Timer Output Switching Characteristics see Figure 7-114 NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT T3 tw(TOUTH) Pulse duration, high PWM -2 + 4P (1) ns T4 tw(TOUTL) Pulse duration, low PWM -2 + 4P (1) ns (1) P = functional clock period in ns. T1 T2 TIMER_IOx (inputs) TIMER_01 T3 T4 TIMER_IOx (outputs) Figure 7-114. Timer Timing Requirements and Switching Characteristics For more information, see Timers section in Peripherals chapter in the device TRM. 7.10.5.18 UART For more details about features and additional description information on the device Universal Asynchronous Receiver Transmitter, see the corresponding subsections within Signal Descriptions and Detailed Description sections. Table 7-144. UART Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 0.5 5 V/ns OUTPUT CONDITIONS CL Output load capacitance 1 30 pF Table 7-145. UART Timing Requirements see Figure 7-115 NO. PARAMETER DESCRIPTION MIN MAX UNIT 4 tw(RX) Pulse width, receive data bit, high or low 0.95U (1) 1.05U (1) ns 5 tw(CTS) Pulse width, receive start bit, high or low 0.95U (1) ns (1) U = UART baud time in ns = 1/programmed baud rate. www.ti.com AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 209 Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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