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STM32H757AI データシート(PDF) 197 Page - STMicroelectronics

部品番号 STM32H757AI
部品情報  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI, crypto
PDF  251 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
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STM32H757AI データシート(HTML) 197 Page - STMicroelectronics

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STM32H757xI
Electrical characteristics
230
2. TBD stands for “to be defined”.
3. In buffered mode, the output can overshoot above the final value for low input code (starting from the minimum value).
4. TON is the refresh phase duration, while TOFF is the hold phase duration. Refer to the product reference manual for more
details.
Table 103. DAC accuracy(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DNL
Differential non
linearity(2)
DAC output buffer ON
−2-
2
LSB
DAC output buffer OFF
−2-
2
-
Monotonicity
10 bits
-
-
-
-
INL
Integral non linearity(3)
DAC output buffer ON, CL ≤ 50 pF,
RL ≥ 5 ㏀
−4-
4
LSB
DAC output buffer OFF,
CL ≤ 50 pF, no RL
−4-
4
Offset
Offset error at code
0x800 (3)
DAC output
buffer ON,
CL ≤ 50 pF,
RL ≥ 5 ㏀
VREF+ = 3.6 V
-
-
±15
LSB
VREF+ = 1.8 V
-
-
±30
DAC output buffer OFF,
CL ≤ 50 pF, no RL
--
±8
Offset1
Offset error at code
0x001(4)
DAC output buffer OFF,
CL ≤ 50 pF, no RL
--
±5
LSB
OffsetCal
Offset error at code
0x800 after factory
calibration
DAC output
buffer ON,
CL ≤ 50 pF,
RL ≥ 5 ㏀
VREF+ = 3.6 V
-
-
±6
LSB
VREF+ = 1.8 V
-
-
±7
Gain
Gain error(5)
DAC output buffer ON,CL ≤ 50 pF,
RL ≥ 5 ㏀
--
±1
%
DAC output buffer OFF,
CL ≤ 50 pF, no RL
--
±1
SNR
Signal-to-noise ratio(6)
DAC output buffer ON,CL ≤ 50 pF,
RL ≥ 5 ㏀ , 1 kHz, BW = 500 KHz
-
67.8
-
dB
DAC output buffer OFF,
CL ≤ 50 pF, no RL,1 kHz, BW =
500 KHz
-
67.8
-
THD
Total harmonic
distortion(6)
DAC output buffer ON, CL ≤ 50 pF,
RL ≥ 5 ㏀ , 1 kHz
-
−78.6
-
dB
DAC output buffer OFF,
CL ≤ 50 pF, no RL, 1 kHz
-
−78.6
-
SINAD
Signal-to-noise and
distortion ratio(6)
DAC output buffer ON, CL ≤ 50 pF,
RL ≥ 5 ㏀ , 1 kHz
-
67.5
-
dB
DAC output buffer OFF,
CL ≤ 50 pF, no RL, 1 kHz
-
67.5
-



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