STM32H7B3AI datasheet(123/238 Pages) STMICROELECTRONICS

123 / 238 page

Table 71. NRST pin characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

RPU(1)

Weak pull-up equivalent resistor(2)

VIN = VSS

㏀

VF(NRST)(1)

NRST Input filtered pulse

1.71 V < VDD < 3.6 V

VNF(NRST)(1)

NRST Input not filtered pulse

1.71 V < VDD < 3.6 V

350

1.62 V < VDD < 3.6 V

1000

1. Guaranteed by design.

2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series

resistance must be minimum (~10%).

Figure 35. Recommended NRST pin protection

STM32

R PU

NRST (2)

VDD

Filter

Internal Reset

0.1 µF

External

reset circuit (1)

The reset network protects the device against parasitic resets.

The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in

Table 65. I/O static characteristics. Otherwise the reset is not taken into account by the device.

6.3.18

FMC characteristics

Unless otherwise specified, the parameters given in the below tables for the FMC interface are derived from tests

performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in

Table 22. General operating conditions, with the following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Measurement points are done at CMOS levels: 0.5VDD

•

IO Compensation cell activated.

•

HSLV activated when VDD ≤ 2.7 V

•

VOS level set to VOS0.

Note:

At VOS1, the performance in some FMC modes can be degraded by up to 5 % compared to VOS0. This is

indicated by a footnote when applicable.

Refer to Section 6.3.16 I/O port characteristics for more details on the input/output alternate function

characteristics.

Asynchronous waveforms and timings

Figure 36 through Figure 38 represent asynchronous waveforms and Table 72 through Table 79 provide the

corresponding timings. The results shown in these tables are obtained with the following FMC configuration:

•

AddressSetupTime = 0x1

•

AddressHoldTime = 0x1

•

DataSetupTime = 0x1 (except for asynchronous NWAIT mode , DataSetupTime = 0x5)

•

BusTurnAroundDuration = 0x0

STM32H7B3xI

Operating conditions

DS13139 - Rev 8

page 123/238

STM32H7B3AI データシート(PDF) 123 Page - STMicroelectronics

STM32H7B3AI データシート(HTML) 123 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

データシートダウンロード