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STM32U545NET3QTR データシート(PDF) 234 Page - STMicroelectronics

部品番号 STM32U545NET3QTR
部品情報  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
PDF  283 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U545NET3QTR データシート(HTML) 234 Page - STMicroelectronics

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Electrical characteristics
STM32U545xx
234/283
DS14216 Rev 1
Figure 40. VREFBUF_OUT versus temperature (VRS = 000)
tSTART
Startup time
CL = 0.5 µF
-
110
200
µs
CL = 1.1 µF
-
240
350
CL = 1.5 µF
-
320
500
IINRUSH
Control of DC
current drive on
VREFBUF_
OUT during startup
phase (6)
--
8
11
mA
IDDA
(VREFBUF
)
VREFBUF
consumption from
VDDA
Iload = 0 µA
-
14
18
µA
Iload = 500 µA
-
16
20
Iload = 4 mA
-
42
50
1. Specified by design and not tested in production, unless otherwise specified.
2. In degraded mode, the voltage reference buffer can not accurately maintain the output voltage (VDDA - drop voltage).
3. Evaluated by characterization. Not tested in production.
4. The capacitive load must include a 100 nF capacitor in order to cut off the high-frequency noise.
5. The load regulation value only takes into account the die and package resistance. The parasitic resistance on PCB
degrades this value.
6. To correctly control the VREFBUF inrush current during startup phase and scaling change, the VDDA voltage must be in the
range of [1.8 V-3.6 V], [2.1 V-3.6 V], [2.4 V-3.6 V] and [2.8 V-3.6 V] for VRS = 000, 001, 010 and 011 respectively.
Table 115. VREFBUF characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
MSv69705V1



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