S2070 datasheet(3/20 Pages) AMCC

部品番号	S2070

部品情報	FIBRE CHANNEL/GIGABIT ETHERNET TRANSCEIVER

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メーカー	AMCC [Applied Micro Circuits Corporation]

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S2070

FIBRE CHANNEL/GIGABIT ETHERNET TRANSCEIVER

March 7, 2001 / Revision G

TRANSMITTER DESCRIPTION

The S2070 transmitter accepts 10-bit parallel input

data and serializes it for transmission over fiber optic

or coaxial cable media. The chip is fully compatible

with the IEEE 802.3z Gigabit Ethernet and ANSI

X3T11 Fibre Channel standards. The S2070 uses a

PLL to generate the serial rate transmit clock. The

transmitter runs at 10 times the TBC input clock, and

operates in either full rate or half rate mode.

Parallel-to-Serial Conversion

The parallel-to-serial converter takes in 10-bit wide

data from the input latch and converts it to a serial

data stream. Parallel data is latched into the trans-

mitter on the positive going edge of TBC. The data is

then clocked into the serial output shift register. The

shift register is clocked by the internally generated

bit clock which is 10x the TBC input frequency. TX[0]

is transmitted first.

Transmit Byte Clock (TBC)

The Transmit Byte Clock (TBC) input must be sup-

plied from a clock source with 100 ppm tolerance to

assure that the transmitted data meets the Fibre

Channel frequency limits. The internal serial clock is

frequency locked to TBC.

TBC is input at full or half rate determined by the

state of the RATEN input. Operating rates are shown

in Table 2.

Transmit Latency

The average transmit latency is 4 parallel clocks.

N

E

T

A

R

t

u

p

n

I

l

e

l

a

r

a

P

)

s

p

b

M

(

e

t

a

R

y

c

n

e

u

q

e

r

F

C

B

T

)

z

H

M

(

t

u

p

t

u

O

l

a

i

r

e

S

)

s

p

b

G

(

e

t

a

R

05

2

15

2

15

2

.

1

05

2

.

6

0

15

2

.

6

0

15

2

6

0

.

1

15

.

2

65

.

2

65

2

6

.

0

15

2

1

.

3

55

2

1

.

3

55

2

1

3

5

.

0

Table 2. Operating Rates

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