ST7FL15F1MATRE datasheet(136/138 Pages) STMICROELECTRONICS

136 / 138 page

ST7L15, ST7L19

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16 REVISION HISTORY

Table 30. Revision History

Date

Revision

Main changes

16-Aug-2006

Initial release

20-Dec-2006

Replaced “ST7L1” with “ST7L15, ST7L19” in document name on page 1

Added “Features” heading above list of features on page 1

“Clock, Reset and Supply Management” on page 1: Removed AVD feature

Changed section 1 on page 4

Figure 1 on page 4:

- removed AVD

- replaced Autoreload Timer 2 with Autoreload Timer 4

- referenced Port C to figure footnote

Table 2 on page 8:

- replaced Autoreload Timer 2 with Autoreload Timer 4

- added “1” to register name and register label of AT4 counter register

Section 7 SUPPLY, RESET AND CLOCK MANAGEMENT features:

- changed Clock Management feature

- removed AVD from SI Management feature

Changed Section 7.4 MULTI-OSCILLATOR (MO)

Section 7.6 SYSTEM INTEGRITY MANAGEMENT (SI): Removed mention of AVD function

from first paragraph

Added caution about avoiding unwanted behavior during Reset sequence in section 7.5.1

on page 25

Figure 12 on page 23: Removed lock32 from bit 7 in SICSR

Figure 17 on page 29: Removed AVD from bits 1:0 in SICSR

Removed Section 7.6.2 Auxiliary Voltage Detector (AVD)

Removed Section 7.6.2.1 Monitoring the VDD Main Supply

Removed Figure 18. Using the AVD to Monitor VDD from Section 7

Section 7.6.2 Low-Power Modes: Removed AVD references

Removed Section 7.6.3.1 Interrupts

Section 7.6.3 Register Description: Changed bits 1:0 to reserved in SICSR

Changed section 11.2 on page 52: Replaced AT3 with AT4

Changed description of bits 11:0 of CNTR register in section 11.2.6 on page 65

Table 5, “Interrupt Mapping,” on page 32: Changed description of interrupt No. 7

Section 13.3.2 Operating Conditions with Low Voltage Detector (LVD): Removed AVD from

current consumption

Removed Section 13.3.3 Auxiliary Voltage Detector (AVD) Thresholds

Section 13.4.1 Supply Current: Changed typical and max values for AWUFH

Section 13.4.1 Supply Current: Changed typical value for ACTIVE HALT

Table 21, “ADC Accuracy with 3V < VDD < 3.6V,” on page 123: Changed typical and maxi-

mum values

Table 22, “ADC Accuracy with 4.5V < VDD < 5.5V,” on page 123: Redistributed max value

footnote links

Table 23, “Thermal Characteristics,” on page 124: Changed package thermal resistance

and power dissapation values

Removed text concerning Pb-containing packages from section 14.2 on page 125

Table 24 on page 125:

- changed title of “Plating Material” column

- removed note concerning Pb-package temperature for leadfree soldering compatibility

Changed Section 15 DEVICE CONFIGURATION AND ORDERING INFORMATION

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