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SN54LVTH162240 データシート(PDF) 1 Page - Texas Instruments |
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SN54LVTH162240 データシート(HTML) 1 Page - Texas Instruments |
1 / 12 page ![]() www.ti.com FEATURES 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE SN54LVTH162240 . . . WD PACKAGE SN74LVTH162240 . . . DGG OR DL PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN54LVTH162240 ,, SN74LVTH162240 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS685F – MARCH 1997 – REVISED NOVEMBER 2006 • Members of the Texas Instruments Widebus™ Family • State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation • Output Ports Have Equivalent 22-Ω Series Resistors, So No External Resistors Are Required • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) • Support Unregulated Battery Operation Down to 2.7 V • Typical V OLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • I off and Power-Up 3-State Support Hot Insertion • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors • Distributed V CC and GND Pin Configuration Minimizes High-Speed Switching Noise • Flow-Through Architecture Optimizes PCB Layout • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) • Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings The 'LVTH162240 devices are 16-bit buffers/drivers designed specifically for low-voltage (3.3-V) VCC operation and to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. They have the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer and provide inverting outputs and symmetrical active-low output-enable (OE) inputs. The outputs, which are designed to source or sink up to 12 mA, include equivalent 22- Ω series resistors to reduce overshoot and undershoot. When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. UNLESS OTHERWISE NOTED this document contains Copyright © 1997–2006, Texas Instruments Incorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
同様の部品番号 - SN54LVTH162240_06 |
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同様の説明 - SN54LVTH162240_06 |
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