PM7367 datasheet(307/323 Pages) PMC

307 / 323 page

PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

293

Figure 33 – PCI Initiator Abort Termination

PCICLK

FRAMEB

123

TRDYB

DEVSELB

IRDYB

The PCI Exclusive Lock Cycle Diagram (Figure 34) illustrates the case when the

current initiator locks the PCI bus. The FREEDM-32P32 will never initiate an

lock, but will behave appropriately when acting as a target.

During clock 1, the present initiator has gained access of the LOCKB signal and

the PCI bus. The first cycle of a locked access must be a read cycle. The

initiator asserts FRAMEB and drives the address of the target on the AD[31:0]

lines.

During clock 2, the present initiator asserts LOCKB to indicate to the target that a

locked cycle is in progress.

During clock 3, the target samples the asserted LOCKB signal and marks itself

locked. The data cycle has to complete in order for the lock to be maintained. If

for some reason the cycle was aborted, the initiator must negate LOCKB.

During clock 4, the data transfer completes and the target is locked.

During clock 6, another initiator may use the PCI bus but it cannot use the

LOCKB signal. If the other initiator attempts to access the locked target that it

did not lock, the target would reject the access.

During clock 7, the same initiator that locked this target accesses the target. The

initiator asserts FRAMEB and negates LOCKB to re-establish the lock.

During clock 8, the target samples LOCKB deasserted and locks itself.

During clock 9, the initiator does not want to continue the lock so it negates

LOCKB. The target samples LOCKB and FRAMEB deasserted it removes its

lock.

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