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WM8994ECS/R データシート(PDF) 293 Page - Cirrus Logic

部品番号 WM8994ECS/R
部品情報  Multi-channel Audio Hub CODEC for Smartphones
PDF  363 Pages
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メーカー  CIRRUS [Cirrus Logic]
ホームページ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8994ECS/R データシート(HTML) 293 Page - Cirrus Logic

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WM8994
Rev 4.6
293
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R772 (0304h)
AIF1ADC
LRCLK
11
AIF1ADC_LRCL
K_DIR
0
Allows ADCLRCLK1 to be enabled in Slave mode
0 = Normal
1 = ADCLRCLK1 enabled in Slave mode
10:0
AIF1ADC_RATE
[10:0]
000_0100_
0000
ADCLRCLK1 Rate
ADCLRCLK1 clock output =
BCLK1 / AIF1ADC_RATE
Integer (LSB = 1)
Valid from 8..2047
Register 0304h AIF1ADC LRCLK
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R773 (0305h)
AIF1DAC
LRCLK
11
AIF1DAC_LRCL
K_DIR
0
Allows LRCLK1 to be enabled in Slave mode
0 = Normal
1 = LRCLK1 enabled in Slave mode
10:0
AIF1DAC_RATE
[10:0]
000_0100_
0000
LRCLK1 Rate
LRCLK1 clock output =
BCLK1 / AIF1DAC_RATE
Integer (LSB = 1)
Valid from 8..2047
Register 0305h AIF1DAC LRCLK
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R774 (0306h)
AIF1DAC
Data
1
AIF1DACL_DAT
_INV
0
AIF1 Left Receive Data Invert
0 = Not inverted
1 = Inverted
0
AIF1DACR_DAT
_INV
0
AIF1 Right Receive Data Invert
0 = Not inverted
1 = Inverted
Register 0306h AIF1DAC Data
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R775 (0307h)
AIF1ADC
Data
1
AIF1ADCL_DAT
_INV
0
AIF1 Left Transmit Data Invert
0 = Not inverted
1 = Inverted
0
AIF1ADCR_DAT
_INV
0
AIF1 Right Transmit Data Invert
0 = Not inverted
1 = Inverted
Register 0307h AIF1ADC Data



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