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IS25LP02GJ-RHLA3 データシート(PDF) 111 Page - Integrated Silicon Solution, Inc

部品番号 IS25LP02GJ-RHLA3
部品情報  SERIAL FLASH MEMORY 166MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  182 Pages
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メーカー  ISSI [Integrated Silicon Solution, Inc]
ホームページ  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP02GJ-RHLA3 データシート(HTML) 111 Page - Integrated Silicon Solution, Inc

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IS25LP02GJ
IS25WP02GJ
Integrated Silicon Solution, Inc.- www.issi.com
111
Rev.A
10/02/2025
8.31 CLEAR EXTENDED READ REGISTER OPERATION (CLERR, 82h)
A Clear Extended Read Register (CLERR) instruction clears PROT_E, P_ERR, and E_ERR error bits in the
Extended Read Register to “0” when the error bits are set to “1”. Once the error bits are set to “1”, they remains set
to “1” until they are cleared to “0” with a CLERR command.
Figure 8.68 Clear Extended Read Register Sequence In SPI Mode
Instruction = 82h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.69 Clear Extended Read Register Sequence In QPI Mode
82h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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