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ST92F120JR1T データシート(PDF) 109 Page - STMicroelectronics |
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ST92F120JR1T データシート(HTML) 109 Page - STMicroelectronics |
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109 / 320 page ![]() 109/320 ST92F120 - RESET AND CLOCK CONTROL UNIT (RCCU) 7.5 OSCILLATOR CHARACTERISTICS The on-chip oscillator circuit uses an inverting gate circuit with tri-state output. OSCOUT must not be used to drive external cir- cuits. When the oscillator is stopped, OSCOUT goes high impedance. In Halt mode, set by means of the HALT instruc- tion, the parallel resistor, R, is disconnected and the oscillator is disabled, forcing the internal clock, CLOCK1, to a high level, and OSCOUT to a high impedance state. To exit the HALT condition and restart the oscilla- tor, an external RESET pulse is required, having a a minimum duration of 20 µs, as illustrated in Fig- ure 56. It should be noted that, if the Watchdog function is enabled, a HALT instruction will not disable the os- cillator. This to avoid stopping the Watchdog if a HALT code is executed in error. When this occurs, the CPU will be reset when the Watchdog times out or when an external reset is applied. Figure 51. Crystal Oscillator Table 24. RS Crystal Specification Legend: C1,C2: Maximum Total Capacitances on pins OSCIN and OSCOUT (the value includes the external capacitance tied to the pin plus the parasitic capacitance of the board and of the device) Note: The tables are relative to the fundamental quartz crystal only (not ceramic resonator). Figure 52. Internal Oscillator Schematic Figure 53. External Clock n OSCIN OSCOUT C1 C2 ST9 CRYSTA L CLOCK VR02116A 1M Ω * *Recommended for oscillator stability C1=C2 Freq. 33pF 22pF 5 MHz 80 ohm 130 ohm 4 MHz 130 ohm 200 ohm 3 MHz 250 ohm - VR02086A REF CLOCK INPUT BUFFER OSCIN OSCOUT HALT OSCIN OSCOUT CLOCK INPUT EXTERNAL CLOCK VR02116B ST9 3.3 k Ω 9 |
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