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ST92F120JR1T データシート(PDF) 126 Page - STMicroelectronics |
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ST92F120JR1T データシート(HTML) 126 Page - STMicroelectronics |
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126 / 320 page  126/320 ST92F120 - I/O PORTS INPUT/OUTPUT BIT CONFIGURATION (Cont’d) Figure 64. Basic Structure of an I/O Port Pin Figure 65. Input Configuration n n Figure 66. Output Configuration n OUTPUT SLAVE LATCH OUTPUT MASTER LATCH INPUT LATCH INTERNAL DATA BUS I/O PIN PUSH-PULL TRISTATE OPEN DRAIN WEAK PULL-UP FROM PERIPHERAL OUTPUT OUTPUT INPUT BIDIRECTIONAL ALTERNATE FUNCTION TO PERIPHERAL INPUTS AND TTL / CMOS (or Schmitt Trigger) INTERRUPTS ALTERNATE FUNCTION INPUT OUTPUT BIDIRECTIONAL OUTPUT MASTER LATCH INPUT LATCH OUTPUT SLAVE LATCH INTERNAL DATA BUS I/O PIN TRISTATE TO PERIPHERAL INPUTS AND TTL / CMOS (or Schmitt Trigger) INTERRUPTS OUTPUT MASTER LATCH INPUT LATCH OUTPUT SLAVE LATCH INTERNAL DATA BUS I/O PIN OPEN DRAIN TTL (or Schmitt Trigger) PUSH-PULL TO PERIPHERAL INPUTS AND INTERRUPTS 9 |
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