データシートサーチシステム |
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4250 データシート(PDF) 10 Page - Renesas Technology Corp |
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4250 データシート(HTML) 10 Page - Renesas Technology Corp |
10 / 59 page 9 MITSUBISHI MICROCOMPUTERS 4250 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER PORT BLOCK DIAGRAMS D T Q Register A Aj F0, F1 OFA instruction IAF instruction Register A Ai OSA instruction Key-on wakeup input D T Q S0–S3 K00 IAS instruction Ai LGOP instruction LO Register S RQ Skip decision (SZD instruction) D0, D1 Decoder Register Y SD instruction RD instruction SCP instruction RCP instruction S RQ S RQ Skip decision (SZD instruction) D2/C Skip decision (SNZCP instruction) PU01 Pull-up transistor Decoder Register Y SD instruction RD instruction (Note 1) (Note 1) (Note 1) (Note 3) (Note 2) (Note 2) (Note 1) D3/K D T Q S RQ Skip decision (SZD instruction) A0 OKA instruction IAK instruction Pull-up transistor PU01 Register A Decoder Register Y SD instruction RD instruction (Note 1) This symbol represents a parasitic diode. Applied potential to ports D0, D1, F0, F1, S0–S3 must be 7V or less. Applied potential to ports D2, D3 must be VDD or less. i represents 0, 1, 2 or 3. j represents 0 or 1. CLD instruction CLD instruction CLD instruction Logic operator Notes 1: 2: 3: |
同様の部品番号 - 4250 |
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同様の説明 - 4250 |
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