M32CSLASH8B datasheet(182/406 Pages) RENESAS

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Under development

M32C/8B Group

15. Timer A

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 165 of 385

Figure 15.20

8-bit Pulse Width Modulator Operation (Timer A)

TAiS bit in the

TABSR register

IR bit in the

TAiIC register

PWM pulse output

from TAiOUT pin

i = 0 to 4

fj: Count source frequency (f1, f8, f2n(1), fC32)

n: high-order bits in the TAi register (00h to FEh)

m: low-order bits in the TAi register (00h to FFh)

(Conditions) High-order bits in the TAi register are set to 02h.

Low-order bits in the TAi register are set to 02h.

TAiMR register: The MR1 bit is set to 0 (falling edge of signal applied to the TAiIN pin.)

Signal applied

to TAiIN pin

When the TAiS bit is set to 0 (count stops) while the TAiOUT

output is "H", the TAiOUT output becomes "L" and the IR bit

becomes 1 (interrupt requested).

Underflow signal of

8-bit prescaler

Count starts

End of 1 cycle

Count stops

Count source

1 / fj x (m+1) x (28-1)

Set to 1 by a program

Set to 0 by a program

1 / fj x (m+1) x n

Set to 0 by an interrupt request acknowledgement or by a program

NOTES:

1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).

2. The 8-bit pulse width modulator counts underflow signals of the 8-bit prescaler.

“H”

“L”

“H”

“L”

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