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M32C/8B データシート(PDF) 217 Page - Renesas Technology Corp |
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M32C/8B データシート(HTML) 217 Page - Renesas Technology Corp |
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217 / 406 page ![]() Under development M32C/8B Group 17. Serial Interfaces Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 200 of 385 Figure 17.4 U0SMR2 to U4SMR2 Registers b7 b6 b5 b4 b1 b2 b3 Symbol U0SMR2 to U2SMR2 U3SMR2, U4SMR2 Address 0366h, 02E6h, 0336h 0326h, 02F6h After Reset 00h 00h b0 Function Bit Symbol Bit Name RW SWC CSC IICM2 SWC2 SDHI When arbitration lost is detected, 0: SDAi output not stopped 1: SDAi output stopped SDA output auto stop bit(1) SDA output stop bit(2) I2C mode select bit 2 STC ALS When start condition is detected, 0: UARTi not initialized 1: UARTi initialized 0: Output data 1: Output stopped (Hi-impedance state) UARTi auto initialization bit(2) 0: Serial clock output from SCLi pin 1: SCLi pin is held "L" SCL wait output bit 2(1) External clock synchronous enable bit(3) 0: Not synchronized with external clock 1: Synchronized with external clock SU1HIM UARTi Special Mode Register 2 (i = 0 to 4) RW RW RW RW RW RW RW RW Clock synchronous bit(1) SCL wait output bit(2) 0: Not clock synchronized 1: Clock synchronized 0: No wait state/release wait states 1:SCLi pin is held "L" after receiving 8th bit. 0: ACK/NACK interrupt used 1: Transmit/receive interrupt used NOTES: 1. These bits are used when the MCU is in master mode in I 2C mode. 2. These bits are used when the MCU is in slave mode in I 2C mode. 3. The external clock synchronous function can be selected with the combination of the SU1HIM bit and the SCLKDIV bit in the UiSMR register. The SU1HIM bit is used in GCI mode. SCLKDIV Bit in the UiSMR register SU1HIM Bit in the UiSMR2 register External Clock Synchronous Function Select 0 0 Not synchronized 0 1 Same frequency as external clock 1 0 or 1 External clock divided by 2 |
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