データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

HD6432351 データシート(PDF) 235 Page - Renesas Technology Corp

部品番号 HD6432351
部品情報  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  RENESAS [Renesas Technology Corp]
ホームページ  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 データシート(HTML) 235 Page - Renesas Technology Corp

Back Button HD6432351 Datasheet HTML 231Page - Renesas Technology Corp HD6432351 Datasheet HTML 232Page - Renesas Technology Corp HD6432351 Datasheet HTML 233Page - Renesas Technology Corp HD6432351 Datasheet HTML 234Page - Renesas Technology Corp HD6432351 Datasheet HTML 235Page - Renesas Technology Corp HD6432351 Datasheet HTML 236Page - Renesas Technology Corp HD6432351 Datasheet HTML 237Page - Renesas Technology Corp HD6432351 Datasheet HTML 238Page - Renesas Technology Corp HD6432351 Datasheet HTML 239Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 235 / 1025 page
background image
Section 7 DMA Controller (DMAC)
Rev. 3.00 Sep 15, 2006 page 201 of 988
REJ09B0330-0300
7.2
Register Descriptions (1) (Short Address Mode)
Short address mode transfer can be performed for channels A and B independently.
Short address mode transfer is specified for each channel by clearing the FAE bit in DMABCR to
0, as shown in table 7.4. Short address mode or full address mode can be selected for channels 1
and 0 independently by means of bits FAE1 and FAE0.
Table 7.4
Short Address Mode and Full Address Mode (For 1 Channel: Example of
Channel 0)
FAE0
Description
0
Short address mode specified (channels A and B operate independently)
MAR0A
Specifies transfer source/transfer destination address
Specifies transfer destination/transfer source address
Specifies number of transfers
Specifies transfer size, mode, activation source, etc.
Specifies transfer source/transfer destination address
Specifies transfer destination/transfer source address
Specifies number of transfers
Specifies transfer size, mode, activation source, etc.
IOAR0A
ETCR0A
DMACR0A
MAR0B
IOAR0B
ETCR0B
DMACR0B
1
Full address mode specified (channels A and B operate in combination)
MAR0A
Specifies transfer source address
Specifies transfer destination address
Not used
Not used
Specifies number of transfers
Specifies number of transfers (used in block transfer
mode only)
Specifies transfer size, mode, activation source, etc.
IOAR0A
ETCR0A
DMACR0A
MAR0B
IOAR0B
ETCR0B
DMACR0B



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com