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PC912XDP512F0CFVR データシート(PDF) 336 Page - Freescale Semiconductor, Inc

部品番号 PC912XDP512F0CFVR
部品情報  HCS12X Microcontrollers
PDF  1348 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PC912XDP512F0CFVR データシート(HTML) 336 Page - Freescale Semiconductor, Inc

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Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
MC9S12XDP512 Data Sheet, Rev. 2.21
336
Freescale Semiconductor
When PACN1 overflows from 0x00FF to 0x0000, the interrupt flag PBOVF in PBFLG is set.
Full count register access will take place in one clock cycle.
NOTE
A separate read/write for high byte and low byte will give a different result
than accessing them as a word.
When clocking pulse and write to the registers occurs simultaneously, write
takes priority and the register is not incremented.



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