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PC312XDP512F0CFVR データシート(PDF) 515 Page - Freescale Semiconductor, Inc |
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PC312XDP512F0CFVR データシート(HTML) 515 Page - Freescale Semiconductor, Inc |
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515 / 1348 page  MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 515 Chapter 12 Serial Peripheral Interface (S12SPIV4) 12.1 Introduction The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral devices. Software can poll the SPI status flags or the SPI operation can be interrupt driven. 12.1.1 Glossary of Terms 12.1.2 Features The SPI includes these distinctive features: • Master mode and slave mode • Bidirectional mode • Slave select output • Mode fault error flag with CPU interrupt capability • Double-buffered data register • Serial clock with programmable polarity and phase • Control of SPI operation during wait mode 12.1.3 Modes of Operation The SPI functions in three modes: run, wait, and stop. • Run mode This is the basic mode of operation. • Wait mode SPI Serial Peripheral Interface SS Slave Select SCK Serial Clock MOSI Master Output, Slave Input MISO Master Input, Slave Output MOMI Master Output, Master Input SISO Slave Input, Slave Output |
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