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AT90PWM2 データシート(PDF) 253 Page - ATMEL Corporation

部品番号 AT90PWM2
部品情報  8-bit Microcontroller with 8K Bytes In-System Programmable Flash
PDF  361 Pages
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メーカー  ATMEL [ATMEL Corporation]
ホームページ  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90PWM2 データシート(HTML) 253 Page - ATMEL Corporation

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253
4317J–AVR–08/10
AT90PWM2/3/2B/3B
As soon as a conversion is requested thanks to the ADSC bit, the Analog to Digital Conversion
is started. In case the amplifier output is modified during the sample phase of the ADC, the on-
going conversion is aborted and restarted as soon as the output of the amplifier is stable. This
ensure a fast response time. The only precaution to take is to be sure that the trig signal (PSC)
frequency is lower than ADCclk/4.
Figure 21-16. Amplifier synchronization timing diagram for AT90PWM2B/3B
With change on analog input signal
Figure 21-17. Amplifier synchronization timing diagram for AT90PWM2B/3B
ADSC is set when the amplifier output is changing due to the amplifier clock
switch.
Valid sample
Delta V
4th stable sample
Signal to be
measured
AMPLI_clk
(Sync Clock)
CK ADC
PSCn_ASY
PSC
Block
ADSC
ADC
Activity
ADC
ADC
Sampling
ADC
Conv
ADC
Sampling
ADC
Conv
ADCResult
Ready
ADCResult
Ready



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