STA382BW datasheet(155/172 Pages) STMICROELECTRONICS

155 / 172 page

STA382BW

Doc ID 022783 Rev 1

155/172

7.23

Bad PWM detection registers (address 0x4D, 0x4E, 0x4F)

The STA382BW implements a detection on the PWM outputs able to verify if the output

signal has no zero-crossing in a configurable time window. This check can be useful to

detect DC levels in the PWM outputs. To be noted that the checks are performed on logic

level PWM (i.e. not the power bridge ones, nor the PWM on DDX3 and DDX4 I/Os).

In case of ternary modulation, the detection threshold is computed as:

TH=[(BPTH*2+1)/128]*100%

If the measured PWM duty cycle is detected greater than or equal to TH for more than

BPTIM PWM periods, the corresponding PWM bit will be set in register 0x4E.

In case of binary modulation, there are two thresholds:

TH1=[(64+BPTH)/128]*100%

TH2=[(64-BPTH)/128]*100%

In this case if the measured PWM duty cycle is outside the TH1-TH2 range for more than

BPTIM PWM periods, the corresponding bit will be set in register 0x4E.

BPTH[5]

BPTH[4]

BPTH[3]

BPTH[2]

BPTH[1]

BPTH[0]

reserved

BP4B

BP4A

BP3B

BP3A

BP2B

BP2A

BP1B

BP1A

BPTIM[7]

BPTIM[6]

BPTIM[5]

BPTIM[4]

BPTIM[3]

BPTIM[2]

BPTIM[1]

BPTIM[0]

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