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WM8321 データシート(PDF) 243 Page - Wolfson Microelectronics plc |
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WM8321 データシート(HTML) 243 Page - Wolfson Microelectronics plc |
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243 / 253 page ![]() Production Data WM8321 w PD, February 2012, Rev 4.0 243 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 13 = HW Control2 input 14 = HW Control1 input (long de-bounce) 15 = HW Control2 input (long de-bounce) Output functions: 0 = GPIO output 1 = 32.768kHz oscillator output 2 = ON state 3 = SLEEP state 4 = Power State Change 5 = Reserved 6 = Reserved 7 = Reserved 8 = DC-DC1 DVS Done 9 = DC-DC2 DVS Done 10 = External Power Enable1 11 = External Power Enable2 12 = System Supply Good (SYSOK) 13 = Converter Power Good (PWR_GOOD) 14 = External Power Clock (2MHz) 15 = Auxiliary Reset 3:1 SYSOK_THR [2:0] 101 SYSOK threshold (rising PVDD) This is the rising PVDD voltage at which SYSOK will be asserted 000 = 2.8V 001 = 2.9V … 111 = 3.5V Note that the SYSOK hysteresis margin is added to these threshold levels. Register 781Fh GPIO6 OTP Control REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R30759 (7827h) ICE CHECK DATA 15:0 ICE_VALID_D ATA [15:0] 0000_0000 _0000_000 0 This field is checked in development mode when an ‘ON’ transition is requested. A value of A596h is required to confirm valid data. Register 7827h ICE CHECK DATA |
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