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KA555IDTF データシート(PDF) 6 Page - Fairchild Semiconductor

部品番号 KA555IDTF
部品情報  Single Timer
Download  14 Pages
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

KA555IDTF データシート(HTML) 6 Page - Fairchild Semiconductor

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An astable timer operation is achieved by adding resistor RB to Figure 1 and configuring as shown on Figure 5. In the astable
operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi
vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential
function with the time constant (RA+RB)*C.
When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high,
resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges
through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator
output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the
VC1 rises again.
In the above process, the section where the timer output is high is the time it takes for the VC1 to rise from Vcc/3 to 2Vcc/3,
and the section where the timer output is low is the time it takes for the VC1 to drop from 2Vcc/3 to Vcc/3. When timer output
is high, the equivalent circuit for charging capacitor C1 is as follows
:
Since the duration of the timer output high state(tH) is the amount of time it takes for the VC1(t) to reach 2Vcc/3,
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
Figure 7. Waveforms of Astable Operation
Vcc
R
A
R
B
C1
Vc1(0-)=Vcc/3
C
1
dv
C1
dt
−−−−−−−−−
V
CC
V0-
()
R
A
R
B
+
−−−−−−−−−−−−−−−−−−−−
=
1
()
V
C1
0+
()
V
CC
3
=
2
()
V
C1
t
()
V
CC
1
2
3
−−e
-
t
R
A
R
B
+
()C1
−−−−−−−−−−−−−−−−−−−−−−




=
3
()


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