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KA555IDTF データシート(PDF) 7 Page - Fairchild Semiconductor |
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KA555IDTF データシート(HTML) 7 Page - Fairchild Semiconductor |
7 / 14 page KA555 KA555 KA555 KA555 7 7 7 7 The equivalent circuit for discharging capacitor C1, when timer output is low, is as follows: Since the duration of the timer output low state( tL) is the amount of time it takes for the VC1(t) to reach Vcc/3, Since RD is normally RB >> RD although related to the size of discharging Tr., tL=0.693RBC1 (10) Consequently, if the timer operates in astable, the period is the same with 'T=tH+tL=0.693(RA+RB)C1+0.693RBC1=0.693(RA+2RB)C1' because the period is the sum of the charge time and discharge time. And since frequency is the reciprocal of the period, the following applies . 3. Frequency divider 3. Frequency divider 3. Frequency divider 3. Frequency divider By adjusting the length of the timing cycle, the basic circuit of Figure 1 can be made to operate as a frequency divider. Figure 8. illustrates a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle. V C1 t () 2 3 −−V CC V CC 1 2 3 −−e – - t H R A R B + ()C1 −−−−−−−−−−−−−−−−−−−−−− – == 4 () t H C 1 R A R B + ()In2 0.693 R A R B + ()C 1 == 5 () C1 R B R D V C1(0-)=2Vcc/3 C 1 dv C1 dt −−−−−−−−− 1 R A R B + −−−−−−−−−−−−−−V C1 0 = + 6 () V C1 t () 2 3 −−VCCe - t R A R D + ()C1 −−−−−−−−−−−−−−−−−−−−−− = 7 () 1 3 ---V CC 2 3 ---V CC e = t L R A R D + ()C1 ------------------------------------- – (8) t L C 1 R B R D + ()In2 0.693 R B R D + ()C 1 = = (9) frequency, f 1 T −− 1.44 R A 2R B + ()C 1 −−−−−−−−−−−−−−−−−−−−−−−− == 11 () |
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同様の説明 - KA555IDTF |
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