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KA555IDTF データシート(PDF) 9 Page - Fairchild Semiconductor |
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KA555IDTF データシート(HTML) 9 Page - Fairchild Semiconductor |
9 / 14 page KA555 KA555 KA555 KA555 9 9 9 9 6. Linear Ramp 6. Linear Ramp 6. Linear Ramp 6. Linear Ramp When the pull-up resistor RA in the monostable circuit shown in Figure 1 is replaced with constant current source, the VC1 increases linearly, generating a linear ramp. Figure 13 shows the linear ramp generating circuit and Figure 14 illustrates the generated linear ramp waveforms. In Figure 13, current source is created by PNP transistor Q1 and resistor R1, R2, and RE. For example, if Vcc=15V, RE=20kΩ, R1=5kW, R2=10kΩ, and VBE=0.7V, VE=0.7V+10V=10.7V Ic=(15-10.7)/20k=0.215mA When the trigger starts in a timer configured as shown in Figure 13, the current flowing through capacitor C1 becomes a 8 4 7 1 2 3 5 6 CONT GND Vcc DISCH THRES RESET TRIG OUT +Vcc +Vcc +Vcc +Vcc R R R R A A A A C C C C R R R R B B B B Modulation Modulation Modulation Modulation Output Output Output Output Figure 11. Circuit for Pulse Position Modulation Figure 11. Circuit for Pulse Position Modulation Figure 11. Circuit for Pulse Position Modulation Figure 11. Circuit for Pulse Position Modulation Figure 12. Waveforms of pulse position modulation Figure 12. Waveforms of pulse position modulation Figure 12. Waveforms of pulse position modulation Figure 12. Waveforms of pulse position modulation Figure 13. Circuit for Linear Ramp Figure 13. Circuit for Linear Ramp Figure 13. Circuit for Linear Ramp Figure 13. Circuit for Linear Ramp Figure 14. Waveforms of Linear Ramp Figure 14. Waveforms of Linear Ramp Figure 14. Waveforms of Linear Ramp Figure 14. Waveforms of Linear Ramp 1 5 6 7 8 4 2 3 RESET Vcc DISCH THRES CONT GND OUT TRIG +Vcc C2 R1 R2 C1 Q1 Output RE I C V CC V E – R E −−−−−−−−−−−−−−−− = 12 () Here, V E is V E V BE R 2 R 1 R 2 + −−−−−−−−−−−−−V CC + = 13 () |
同様の部品番号 - KA555IDTF |
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同様の説明 - KA555IDTF |
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