M68ICS08GR datasheet(258/408 Pages) FREESCALE

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Serial Communications Interface (SCI)

Technical Data

MC68HC908GR8 — Rev 4.0

258

Serial Communications Interface (SCI)

MOTOROLA

18.9.3 SCI Control Register 3

SCI control register 3:

•

Stores the ninth SCI data bit received and the ninth SCI data bit to

be transmitted

•

Enables these interrupts:

–

Receiver overrun interrupts

–

Noise error interrupts

–

Framing error interrupts

•

Parity error interrupts

R8 — Received Bit 8

When the SCI is receiving 9-bit characters, R8 is the read-only ninth

bit (bit 8) of the received character. R8 is received at the same time

that the SCDR receives the other 8 bits.

When the SCI is receiving 8-bit characters, R8 is a copy of the eighth

bit (bit 7). Reset has no effect on the R8 bit.

T8 — Transmitted Bit 8

When the SCI is transmitting 9-bit characters, T8 is the read/write

ninth bit (bit 8) of the transmitted character. T8 is loaded into the

transmit shift register at the same time that the SCDR is loaded into

the transmit shift register. Reset has no effect on the T8 bit.

Address:

$0015

Bit 7

654321

Bit 0

Read:

DMARE

DMATE

ORIE

NEIE

FEIE

PEIE

Write:

Reset:

000000

= Unimplemented

U = Unaffected

Figure 18-11. SCI Control Register 3 (SCC3)

Freescale Semiconductor, Inc.

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