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M68ICS08GR データシート(PDF) 291 Page - Freescale Semiconductor, Inc |
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M68ICS08GR データシート(HTML) 291 Page - Freescale Semiconductor, Inc |
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291 / 408 page  System Integration Module (SIM) Low-Power Modes MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA System Integration Module (SIM) 291 wait mode. Some modules can be programmed to be active in wait mode. Wait mode also can be exited by a reset or break. A break interrupt during wait mode sets the SIM break stop/wait bit, SBSW, in the SIM break status register (SBSR). If the COP disable bit, COPD, in the mask option register is logic 0, then the computer operating properly module (COP) is enabled and remains active in wait mode. Figure 19-15. Wait Mode Entry Timing Figure 19-16 and Figure 19-17 show the timing for WAIT recovery. Figure 19-16. Wait Recovery from Interrupt or Break WAIT ADDR + 1 SAME SAME IAB IDB PREVIOUS DATA NEXT OPCODE SAME WAIT ADDR SAME R/W Note: Previous data can be operand data or the WAIT opcode, depending on the last instruction. $6E0C $6E0B $00FF $00FE $00FD $00FC $A6 $A6 $01 $0B $6E $A6 IAB IDB EXITSTOPWAIT Note: EXITSTOPWAIT = RST pin, CPU interrupt, or break interrupt Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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