W-5200 5

7

Device Operation

The

use a switched capacitor charge pump to

boost the voltage at IN to a regulated output voltage.

Regulation is achieved by sensing the output

through an internal resistor divider (

and

modulating the charge pump output current based on the

error signal. A 2 phase non overlapping clock activates the

charge pump switches. The flying capacitor is charged from

the IN voltage on the first phase of the clock. On the second

phase of the clock it is stacked in series with the input voltage

and connected to OUT. The charging and discharging the

flying capacitor continues at a free running frequency of

typically 2 MHz.

In shutdown mode all circuitry is turned off and the

supply. OUT is disconnected from IN. The SHDN pin is a

CMOS input with a threshold voltage of approximately

0.8 V. The

is in shutdown when a logic LOW is

applied to the SHDN pin. The SHDN pin is a high

impedance CMOS input. SHDN does not have an

internal pull down resistor and should not be allowed to

float and. It must always be driven with a valid logic level.

Short Circuit and Thermal Protection

The

have

short circuit current

limiting and over temperature protection. During overload

conditions, output current is limited to approximately 225

mA. At higher temperatures, or if the input voltage is high

enough to cause excessive chip self heating, the thermal

shutdown circuit shuts down the charge pump as the

junction temperature exceeds approximately 160 C. Once

the junction temperature drops back to approximately

140 C, the charge pump is enabled.

The

will cycle in and out of thermal shutdown

indefinitely

without

latch u p

or

damage

until

a

short circuit on OUT is removed.