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STM32F479AI データシート(PDF) 112 Page - STMicroelectronics |
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STM32F479AI データシート(HTML) 112 Page - STMicroelectronics |
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112 / 217 page ![]() Electrical characteristics STM32F479xx 112/217 DocID028010 Rev 3 APB2 (up to 90 MHz) SDIO 7.94 7.18 6.37 µA/MHz TIM1 19.44 17.81 15.80 TIM8 19.44 17.81 15.80 TIM9 8.44 7.60 6.77 TIM10 5.67 5.03 4.50 TIM11 5.72 5.10 4.55 ADC1(6) 5.06 4.54 4.05 ADC2(6) 5.00 4.47 3.97 ADC3(6) 5.26 4.75 4.17 USART1 4.83 4.33 3.83 USART6 4.83 4.33 3.83 SPI1 2.11 1.76 1.60 SPI4 2.11 1.69 1.60 SPI5 2.11 1.76 1.60 SPI6 2.11 1.76 1.60 SYSCFG 1.72 1.35 1.22 LTDC 37.61 34.53 30.60 SAI1 3.44 3.01 2.72 DSI 32.98 30.32 26.87 1. When the I/O compensation cell is ON, IDD typical value increases by 0.22 mA. 2. DMA1/DMA2 current consumption is calculated by the equation. N: is the number of streams enabled, N= [1..8] 3. The BusMatrix is automatically active when at least one master is ON. 4. To enable an I2S peripheral, first set the I2SMOD bit and then the I2SE bit in the SPI_I2SCFGR register. 5. When the DAC is ON and EN1/2 bits are set in DAC_CR register, add an additional power consumption of 0.8 mA per DAC channel for the analog part. 6. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for the analog part. Table 33. Peripheral current consumption (continued) Peripheral IDD(Typ)(1) Unit Scale 1 Scale 2 Scale 3 |
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