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STM32F479AI データシート(PDF) 160 Page - STMicroelectronics |
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STM32F479AI データシート(HTML) 160 Page - STMicroelectronics |
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160 / 217 page  Electrical characteristics STM32F479xx 160/217 DocID028010 Rev 3 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 56 or Figure 57, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed them as close as possible to the chip. Figure 56. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176 and TFBGA216. VREF+ is also available on LQFP176 and LQFP208. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. Figure 57. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176 and TFBGA216. VREF+ is also available on LQFP176 and LQFP208. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. |
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