STM32F413CG datasheet(108/207 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F413xG/H

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DocID029162 Rev 2

The characteristics given in Table 40 result from tests performed using an high-speed

external clock source, and under ambient temperature and supply voltage conditions

summarized in Table 16.

Low-speed external user clock generated from an external source

In bypass mode the LSE oscillator is switched off and the input pin is a standard I/O. The

external clock signal has to respect the Table 58. However, the recommended clock input

waveform is shown in Figure 28.

The characteristics given in Table 41 result from tests performed using an low-speed

external clock source, and under ambient temperature and supply voltage conditions

summarized in Table 16.

Table 40. High-speed external user clock characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fHSE_ext

External user clock source

frequency(1)

1. Guaranteed by design.

MHz

VHSEH

OSC_IN input pin high level voltage

0.7VDD

-VDD

VHSEL

OSC_IN input pin low level voltage

VSS

-0.3VDD

tw(HSE)

OSC_IN high or low time(1)

tr(HSE)

tf(HSE)

OSC_IN rise or fall time(1)

Cin(HSE) OSC_IN input capacitance(1)

-5

DuCy(HSE) Duty cycle

OSC_IN Input leakage current

VSS ≤VIN ≤VDD

±1

µA

Table 41. Low-speed external user clock characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fLSE_ext

User External clock source

frequency(1)

32.768

1000

kHz

VLSEH

OSC32_IN input pin high level

voltage

0.7VDD

-VDD

VLSEL

OSC32_IN input pin low level voltage

VSS

-0.3VDD

tw(LSE)

tf(LSE)

OSC32_IN high or low time(1)

450

tr(LSE)

tf(LSE)

OSC32_IN rise or fall time(1)

Cin(LSE)

OSC32_IN input capacitance(1)

-5

DuCy(LSE) Duty cycle

OSC32_IN Input leakage current

VSS ≤ VIN ≤ VDD

±1

µA

1. Guaranteed by design.

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