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ST7MC1K2-Auto データシート(PDF) 132 Page - STMicroelectronics

部品番号 ST7MC1K2-Auto
部品情報  Clock, reset and supply management
PDF  371 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7MC1K2-Auto データシート(HTML) 132 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
On-chip peripherals
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
132/371
If CPOL is changed at the communication byte boundaries, the SPI must be disabled by resetting the
SPE bit.
Figure 58.
Data clock timing diagram
1.
This figure should not be used as a replacement for parametric information. Refer to Section 12: Electrical characteristics.
SCK
MSBit
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
LSBit
MSBit
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
LSBit
MISO
(from master)
MOSI
(from slave)
SS
(to slave)
Capture strobe
CPHA = 1
CPHA = 0
(CPOL = 1)
SCK
(CPOL = 0)
SCK
MISO
(from master)
MOSI
(from slave)
SS
(to slave)
Capture strobe
(CPOL = 1)
SCK
(CPOL = 0)
MSBit
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
LSBit
MSBit
Bit 6
Bit 5
Bit 4
Bit3
Bit 2
Bit 1
LSBit
Obsolete
Product(s)
- Obsolete
Product(s)



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