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ST72344K2 データシート(PDF) 176 Page - STMicroelectronics |
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ST72344K2 データシート(HTML) 176 Page - STMicroelectronics |
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176 / 247 page  On-chip peripherals ST72344xx, ST2345xx 176/247 Doc ID 12321 Rev 6 Figure 80. Random read (dummy write + stop + start + current address read) Figure 81. Sequential read Figure 82. Combined format for read Legend: SA - Slave Address, BA - Byte Address, W: Write, R: Read 11.7.6 Low-power modes Start Ack Ack Start SA R Ack Data Nack Stop W SA BA Stop Start Ack Ack Ack Data Nack Stop SA RData Data Start SA R Ack Data Nack Restart SA R Ack Data Nack Stop Table 68. Mode description Mode Description Wait No effect on I2C interface. I2C interrupts causes the device to exit from Wait mode. Halt I2C registers are frozen. In Halt mode, the I2C interface is inactive and does not acknowledge data on the bus. The I2C interface resumes operation when the MCU is woken up by an interrupt with “exit from Halt mode” capability. Active-halt I2C registers are frozen. In Active halt mode, the I2C interface is inactive and does not acknowledge data on the bus. The I2C interface resumes operation when the MCU is woken up by an interrupt with “exit from Active-halt mode” capability. |
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