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STM8L151X6 データシート(PDF) 119 Page - STMicroelectronics

部品番号 STM8L151X6
部品情報  Operating conditions
PDF  146 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8L151X6 データシート(HTML) 119 Page - STMicroelectronics

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DocID17943 Rev 10
119/146
STM8L151x6/8 STM8L152x6/8
Electrical parameters
123
Figure 45. Maximum dynamic current consumption on VREF+ supply pin during ADC
conversion
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 46 or Figure 47,
depending on whether VREF+ is connected to VDDA or not. Good quality ceramic 10 nF
capacitors should be used. They should be placed as close as possible to the chip.
Table 57. RAIN max for fADC = 16 MHz(1)
Ts
(cycles)
Ts
(µs)
RAIN max (kohm)
Slow channels
Fast channels
2.4 V < VDDA < 3.6 V 1.8 V < VDDA < 2.4 V 2.4 V < VDDA < 3.3 V 1.8 V < VDDA < 2.4 V
4
0.25
Not allowed
Not allowed
0.7
Not allowed
9
0.5625
0.8
Not allowed
2.0
1.0
16
1
2.0
0.8
4.0
3.0
24
1.5
3.0
1.8
6.0
4.5
48
3
6.8
4.0
15.0
10.0
96
6
15.0
10.0
30.0
20.0
192
12
32.0
25.0
50.0
40.0
384
24
50.0
50.0
50.0
50.0
1. Guaranteed by design.



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