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STM32F769AI データシート(PDF) 173 Page - STMicroelectronics |
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STM32F769AI データシート(HTML) 173 Page - STMicroelectronics |
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173 / 255 page  DocID029041 Rev 4 173/255 STM32F765xx STM32F767xx STM32F768Ax STM32F769xx Electrical characteristics 224 Figure 41. ADC accuracy characteristics 1. See also Table 73. 2. Example of an actual transfer curve. 3. Ideal transfer curve. 4. End point correlation line. 5. ET = Total Unadjusted Error: maximum deviation between the actual and the ideal transfer curves. EO = Offset Error: deviation between the first actual transition and the first ideal one. EG = Gain Error: deviation between the last ideal transition and the last actual one. ED = Differential Linearity Error: maximum deviation between actual steps and the ideal one. EL = Integral Linearity Error: maximum deviation between any actual transition and the end point correlation line. Figure 42. Typical connection diagram using the ADC 1. Refer to Table 71 for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 5 pF). A high Cparasitic value downgrades conversion accuracy. To remedy this, fADC should be reduced. |
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