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MPXM2102AS データシート(PDF) 107 Page - Motorola, Inc |
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MPXM2102AS データシート(HTML) 107 Page - Motorola, Inc |
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107 / 670 page  AN1611 2–71 Motorola Sensor Device Data www.motorola.com/semiconductors OCMPLO1 EQU $17 ; Output Compare Register 1 Low Byte TCNTHI EQU $18 ; Timer Count Register High Byte TCNTLO EQU $19 ; Timer Count Register Low Byte OCMPHI2 EQU $1E ; Output Compare Register 2 High Byte OCMPLO2 EQU $1F ; Output Compare Register 2 Low Byte ****************************************** * * * User–defined RAM * * * ****************************************** SIGN EQU $54 ; Acceleration (–) or deceleration (+) PRESHI2 EQU $55 ; MSB of accumulated acceleration PRESHI EQU $56 PRESLO EQU $57 ; LSB of accumulated acceleration PTEMPHI EQU $58 ; Acceleration High Byte (Temp storage) PTEMPLO EQU $59 ; Acceleration Low Byte (Temp storage) ACCHI EQU $5A ; Temp storage of acc value (High byte) ACCLO EQU $5B ; (Low byte) ADCOUNTER EQU $5C ; Sampling Counter AVERAGE_H EQU $5D ; MSB of the accumulated data of low g AVERAGE_M EQU $5E AVERAGE_L EQU $5F ; LSB of the accumulated data of low g SHIFT_CNT EQU $60 ; Counter for shifting the accumulated data AVE_CNT1 EQU $61 ; Number of samples in the accumulated data AVE_CNT2 EQU $75 TEMPTCNTHI EQU $62 ; Temp storage for Timer count register TEMPTCNTLO EQU $63 ; Temp storage for Timer count register DECHI EQU $64 ; Decimal digit high byte DECLO EQU $65 ; Decimal digit low byte DCOFFSETHI EQU $66 ; DC offset of the output (high byte) DCOFFSETLO EQU $67 ; DC offset of the output (low byte) MAXACC EQU $68 ; Maximum acceleration TEMPHI EQU $69 TEMPLO EQU $6A TEMP1 EQU $6B ; Temporary location for ACC during delay TEMP2 EQU $6C ; Temporary location for ACC during ISR DIV_LO EQU $6D ; No of sampling (low byte) DIV_HI EQU $6E ; No of sampling (high byte) NO_SHIFT EQU $6F ; No of right shift to get average value ZERO_ACC EQU $70 ; Zero acceleration in no of ADC steps HOLD_CNT EQU $71 ; Hold time counter HOLD_DONE EQU $72 ; Hold time up flag START_TIME EQU $73 ; Start of count down flag RSHIFT EQU $74 ; No of shifting required for division ORG $300 ; ROM space 0300 to 3DFE (15,104 bytes) DB $FC ; Display ”0” DB $30 ; Display ”1” DB $DA ; Display ”2” DB $7A ; Display ”3” DB $36 ; Display ”4” DB $6E ; Display ”5” DB $EE ; Display ”6” DB $38 ; Display ”7” DB $FE ; Display ”8” DB $7E ; Display ”9” HUNDREDHI DB $00 ; High byte of hundreds HUNDREDLO DB $64 ; Low byte of hundreds TENHI DB $00 ; High byte of tens TENLO DB $0A ; Low byte of tens ****************************************** * * * Program starts here upon hard reset * * * ****************************************** RESET CLR PORTC ; Port C = 0 CLR PORTB ; Port B = 0 CLR PORTA ; Port A = 0 LDA #$FF STA $06 ; Port C as output STA $05 ; Port B as output STA $04 ; Port A as output LDA TSTATUS ; Dummy read the timer status register CLR OCMPHI2 ; so as to clear the OCF CLR OCMPHI1 LDA OCMPLO2 JSR COMPRGT CLR START_TIME Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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