Serial SRAM Features
• Unlimited Reads/Unlimited Writes:
- Standard serial SRAM protocol
- Symmetrical timing for reads and writes
• SRAM Array:
- 8,192 x 8 bits
• High-Speed I2C Interface:
- Industry standard: 1 MHz, 400 kHz, and
100 kHz
- Zero cycle delay writes and reads to SRAM
array
- Schmitt Trigger inputs for noise suppression
• Low-Power CMOS Technology:
- Active current: 1 mA (maximum)
- Standby current: 200 μA (maximum)
Hidden EEPROM Backup Features
• Cell-Based Nonvolatile Backup:
- Mirrors SRAM array cell-for-cell
- Transfers all data to/from SRAM cells in
parallel (all cells at same time)
• Invisible-to-User Data Transfers:
- VCC level monitored inside device
- SRAM automatically saved on power disrupt
- SRAM automatically restored on VCC return
• 100,000 Backups Minimum
• 100 Years Retention (at 55°C)
Other Features of the 47L64
• Operating Voltage Range: 2.7V to 3.6V
• Temperature Ranges:
- Industrial (I): -40°C to +85°C
• ESD protection: >2,000V