GENERAL DESCRIPTION
The ADF4193 frequency synthesizer can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. Its architecture is specifically designed to meet the GSM/EDGE lock time requirements for base stations. It consists of a low noise, digital phase frequency detector (PFD), and a precision differential charge pump. There is also a differential amplifier to convert the differential charge pump output to a single-ended voltage for the external voltage-controlled oscillator (VCO).

FEATURES
   New, fast settling, fractional-N PLL architecture
   Single PLL replaces ping-pong synthesizers
   Frequency hop across GSM band in 5 µs with phase settled
      by 20 µs
   0.5° rms phase error at 2 GHz RF output
   Digitally programmable output phase
   RF input range up to 3.5 GHz
   3-wire serial interface
   On-chip, low noise differential amplifier
   Phase noise figure of merit: −216 dBc/Hz
   Loop filter design possible using ADIsimPLL
   Qualified for automotive applications

APPLICATIONS
   GSM/EDGE base stations
   PHS base stations
   Instrumentation and test equipment