Introduction
The MC68HC705J1A is a member of Motorola’s low-cost, high-performance M68HC05 Family of 8-bit microcontroller units (MCUs). The M68HC05 Family is based on the customer-specified integrated circuit (CSIC) design strategy. All MCUs in the family use the popular M68HC05 central processor unit (CPU) and are available with a variety of subsystems, memory sizes and types, and package types.
On-chip memory of the MC68HC705J1A includes 1240 bytes of erasable, programmable read-only memory (EPROM). In packages without the transparent window for EPROM erasure, the 1240 EPROM bytes serve as one-time programmable read-only memory (OTPROM).

Features
Features of the MC68HC705J1A include:
• Peripheral modules:
   – 15-stage multifunction timer
   – Computer operating properly (COP) watchdog
• 14 bidirectional input/output (I/O) lines, including:
   – 10-mA sink capability on four I/O pins
   – Mask option register (MOR) and software programmable pulldowns on all I/O pins
   – MOR selectable interrupt on four I/O pins, a keyboard scan feature
• MOR selectable sensitivity on external interrupt (edge- and level-sensitive or edge-sensitive only)
• On-chip oscillator with connections for:
   – Crystal
   – Ceramic resonator
   – Resistor-capacitor (RC) oscillator
   – External clock
• 1240 bytes of EPROM/OTPROM, including eight bytes for user vectors
• 64 bytes of user random-access memory (RAM)
• Memory-mapped I/O registers
• Fully static operation with no minimum clock speed
• Power-saving stop, halt, wait, and data-retention modes
• External interrupt mask bit and acknowledge bit
• Illegal address reset
• Internal steering diode and pullup resistor from RESET pin to VDD