1 Features
• Available in the Texas Instruments NanoFree™
Package
• VCC Isolation Feature: If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance State
• Dual Supply Rail Design
• I/Os Are 4.6V Over Voltage Tolerant
• Ioff Supports Partial-Power-Down Mode Operation
• Max Data Rates
– 500Mbps (1.8V to 3.3V)
– 320Mbps (<1.8V to 3.3V )
– 320Mbps (Level-Shifting to 2.5V or 1.8V)
– 280Mbps (Level-Shifting to 1.5V)
– 240Mbps (Level-Shifting to 1.2V)
• Latch-Up Performance Exceeds 100mA Per JESD
78, Class II
• ESD Protection Exceeds JESD 22

2 Applications
• Smartphones
• Servers
• Desktop PCs and notebooks
• Other portable devices

3 Description
This 2-bit non-inverting bus transceiver uses two
separate configurable power-supply rails. The A ports
are designed to track VCCA and accepts any supply
voltage from 1.2V to 3.6V. The B ports are designed
to track VCCB and accepts any supply voltage from
1.2V to 3.6V. This allows for universal low-voltage
bidirectional translation and level-shifting between any
of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.
The SN74AVC2T45 is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR pin) input activate
either the B-port outputs or the A-port outputs. The
device transmits data from the A bus to the B bus
when the B-port outputs are activated and from the
B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports
always is active and must have a logic HIGH or LOW
level applied to prevent excess leakage current on the
internal CMOS structure.