1. General description
In high-power applications, it is common practice to connect two or more MOSFETs in parallel to
provide high current capability. Even when the gates are driven from the same gate driver, it can be
challenging to ensure that MOSFETs share the load current equally.
Small differences in VGS(th) for individual devices cause the MOSFET with the lowest VGS(th) to turnon
first, taking a larger share of the load current during the dynamic switching phase.
The difference in load current between individual MOSFETs ΔID can be significant often leading to
differential heating and potential accelerated failure.
One method to reduce the ΔI between MOSFETs is to select devices with matched VGS(th), but
testing & sorting MOSFETs with matched VGS(th) can be a difficult process. VGS(th) is typically
measured at ΔID < 1 mA and is influenced by temperature also.
ASFETs with enhanced dynamic current sharing are designed to show significantly improved
current sharing with low ΔID when connected in parallel applications, they also deliver improved
temperature stability showing lower ΔID due to temperature differences across the PCB.

2. Features and benefits
• Removes the need for VGS(th) matching
• Low ΔID enhances current sharing in parallel applications
• Less sensitive to temperature differences across the PCB
• Reduced VGS(th) spread
• Low RDSon
• 255 A continuous ID Max
• Avalanche rated, 100% tested
• Compact and Reliable 8x8 LFPAK88 package, qualified to 175 °C

3. Applications
• Applications using MOSFETs in parallel
• Applications utilizing MOSFETs with matched VGS(th)
• High-power motor control