4-Bit Counters/Registers
Multiplexed Outputs for Counter or Latched
Data
3-State Outputs Drive Bus Lines Directly
'LS696.. Decade Counter, Direct Clear
'LS697.. Binary Counter, Direct Clear
'LS699.. Binary Counter, Synchronous
Clear

description
These low-power Schottky LSI devices incorporate
synchronous up/down counters, four-bit D-type registers,
and quadruple two-line to one-line multiplexers with three
state outputs in a single 20-pin package. The up/down
counters are programmable from the data inputs and
feature enable P and enable T and a ripple-carry output
for easy expansion. The register/counter select input R/C,
selects the counter when low and the register when high
for the three-state outputs, QA. QB. QC, and QD. These
outputs are rated at 12 and 24 milliamperes (54LS/74LS)
for good bus driving performance.
Both the counter CCK and register clock RCK are positiveedge triggered. The counter clear CCLR is
active low and is asynchronous on the 'LS696 and
'LS697, synchronous on the 'LS699. Loading of the
counter is accomplished when LOAD is taken low and
a positive transition occurs on the counter clock CCK.
Expansion is easily accomplished by connecting RCO
of the first stage to ENT of the second stage, etc. All
ENP inputs can be tied common and used as a master
enable or disable control.