Description

This 8-bit serial shift register shifts data from QAto QHwhen clocked. Parallel inputs to each stage are enabled by a low level at the Shift/Load input. Also included is a gated clock input and a complementary output from the eighth bit.

Features

•  High Speed Operation: tpd(Clock to QH) = 21 ns typ (CL= 50 pF)

•  High Output Current: Fanout of 10 LSTTL Loads

•  Wide Operating Voltage: VCC= 2 to 6 V

•  Low Input Current: 1 µA max

•  Low Quiescent Supply Current: ICC(static) = 4 µA max (Ta = 25°C)