GENERAL DESCRIPTION
The Taiwan Memory Technology Synchronous Burst RAM family employs high-speed, low power CMOS design using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high valued resistors.

FEATURES
➤ V FT pin for user configurable pipeline or flow-through operation.
➤ V1 Fast Access times:
    - Pipeline – 3.8 / 4 / 4.5 ns
    - Flow-through – 9 / 10 / 11ns
➤ V Single 3.3V +0.3V/-0.165V power supply
➤ V Common data inputs and data outputs
➤ V Individual BYTE WRITE ENABLE and GLOBAL WRITE control
➤ V Three chip enables for depth expansion and address pipelining
➤ V Clock-controlled and registered address, data I/Os and control signals
➤ V Internally self-timed WRITE CYCLE
➤ V Burst control pins ( interleaved or linear burst sequence)
➤ V High 30pF output drive capability at rated access time
➤ V SNOOZE MODE for reduced power standby
➤ V Burst Sequence :
    - Interleaved (MODE=NC or VCC)