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DM9302 データシート (PDF) - Davicom Semiconductor, Inc.

DM9302 Datasheet PDF - Davicom Semiconductor, Inc.
部品番号 DM9302
ダウンロード  DM9302 ダウンロード

ファイルサイズ   406.12 Kbytes
ページ   64 Pages
メーカー  DAVICOM [Davicom Semiconductor, Inc.]
ホームページ  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.
部品情報 10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

DM9302 Datasheet (PDF)

Go To PDF Page ダウンロード データシート
DM9302 Datasheet PDF - Davicom Semiconductor, Inc.

部品番号 DM9302
ダウンロード  DM9302 Click to download

ファイルサイズ   406.12 Kbytes
ページ   64 Pages
メーカー  DAVICOM [Davicom Semiconductor, Inc.]
ホームページ  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.
部品情報 10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

DM9302 データシート (HTML) - Davicom Semiconductor, Inc.

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DM9302 製品詳細

GENERAL DESCRIPTION
The DM9302 Fiber converter is complied with IEEE802.3 standards, and designed to convert data signal between 10/100 Base-TX and 100 Base-FX fast Ethernet.
Media converters are connected between Fiber cable and twisted cable segments with network and also the simplest way to interconnect any equipment’s 100BASE-TX / 10BASE-T to the 100BASE-FX interface network.

FEATURES
❐ 10/100BASE-TX/FX switch base single-chip media converter
❐ Compliant with IEEE802.3u 100BASE-TX standard, Compliant with ANSI X3T12 TP-PMD 1995 standard, Compliant with ANSI X3.166 FDDI-PMD
❐ 8/16-bit Processor Interface
❐ Per port supports 4 priority queues by Port-based, 802.1P VLAN, and IP TOS priority.
❐ Support 802.1Q VLAN up-to 16 VLAN group
❐ Support VLAN ID tag/untag options
❐ Per port support bandwidth, ingress and egress rate control
❐ Support Broadcast Storming filter function
❐ Support Store and Forward switching approach
❐ Support IEEE 802.3x Flow Control in Full-duplex mode
❐ Support Back Pressure Flow Control in Half-duplex mode
❐ Recode up-to 1K Uni-cast MAC addresses
❐ Automatic aging scheme
❐ EEPROM interface for power up configurations
❐ Support MIB-II counters
❐ Local bus slave architecture
❐ TCP/IP/UDP/IPv4 checksum offload
❐ Compatible with 3.3V and 5.0V tolerant I/O
❐ DSP PHY with HP Auto-MDIX, DSP architecture PHY Transceiver
❐ 64-pin LQFP, 0.18 um process, support Lead-Free and Halogen–Free




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